Selected Publications

2012

  • Tran, T., Rothenbuhler, A., Barney Smith, E., Saxena, V., Campbell, K., "Reconfigurable Threshold Logic gates using Memristive Devices," IEEE Subthreshold Microelectronics Conference, Waltham, Oct 2012.
  • Balagopal, S., and Saxena, V., "A 1 GS/s, 31 MHz BW, 76.3 dB Dynamic Range, 34 mW CT Delta-Sigma ADC with 1.5 Cycle Quantizer Delay and Improved STF," proc. 55th Midwest Symposium on Circuits and Systems, Boise, 2012.
  • Balagopal, S., and Saxena, V., "Design of Wideband Continuous-Time Delta-Sigma ADCs Using Two-Step Quantizers," (invited) proc. 55th Midwest Symposium on Circuits and Systems, Boise, 2012.
  • Balagopal, S., and Saxena, V., "A Low-Power Single-bit Continuous-time Delta-Sigma Converter with 92.5 Dynamic Range for Biomedical Applications," Journal of Low Power Electronics and Applications 2 (3), 197-209. July 2012.
  • Koppula, R., Balagopal, S., and Saxena, V., "Multi-bit Continuous-time Delta-Sigma Modulator for Audio Application," IEEE/EDS Workshop on Microelectronics and Electron Devices (WMED), April, 2012.

2011

  • Saxena, V., Balagopal, S., and H. Chen, "Reconfigurable Continuous-Time Delta-Sigma Analog-to-Digital Converters for Software-Defined and Multi-Standard Radios," SDR WinnComm Conference, Washington DC, Nov 29-Dec2 2011.
  • Balagopal, S., and Saxena, V., "A Low-Power Single-bit Continuous-time Delta-Sigma Converter with 92.5 Dynamic Range and design of Low-Voltage Delta-Sigma ADCs," IEEE/MITLL Subthreshold Microelectronics Conference, Boston, Sep 2011. (slides)
  • Saxena, V. and Baker, R. J., "Analog and Digital VLSI Design," Chapter 19 in the Fundamentals of Industrial Electronics, Wilamowski, B. M. and Irwin, J. D. (editors), CRC Press, 2011. ISBN 978-1-439-80279-3
  • Saxena, V., Balagopal S. and Baker, R. J., "Systematic Design of Three-Stage Opamps using Split-Length Compensation," (invited) proceedings of the 54th Midwest Symposium on Circuits and Systems, Seoul, 2011.
  • Balagopal, S., Koppula, R. and Saxena, V., "Systematic design of multibit continuous time delta sigma modulators using two-step quantizer," (best student paper contest) proceedings of the 54th Midwest Symposium on Circuits and Systems, Seoul, 2011.
  • Balagopal, S., Koppula, R. and Saxena, V., "Efficient Design and Synthesis of Decimation Filters for Wideband Delta-Sigma ADCs,", (poster) IEEE/EDS Workshop on Microelectronics and Electron Devices (WMED), April, 2011.
  • Balagopal, S., and Saxena, V., "A Low-Power Single-bit Continuous-time Delta-Sigma Converter with 92.5 Dynamic Range and design of Low-Voltage Delta-Sigma ADCs," IEEE Subthreshold Microelectronics Conference, Boston, Sep 2011.

2010

  • Balagopal, S., Koppula, R. and Saxena, V., "A 110µW Single-Bit Continuous-time Delta-Sigma Converter with 94.4dB Dynamic Range," proceedings of Dallas Workshop on Circuits and Systems (DCAS), Oct 16-18, 2010. (slides)
  • Saxena, V. and Baker, R. J., "Synthesis of Higher-Order K-Delta-1-Sigma Modulators for Wideband ADCs," proceedings of the 53rd Midwest Symposium on Circuits and Systems, August 1-4, 2010.
  • Saxena, V. and Baker, R. J., "Indirect Compensation Techniques for Three-Stage Fully-Differential Opamps," (invited) proceedings of the 53rd Midwest Symposium on Circuits and Systems, August 1-4, 2010.

2009

  • Gupta, S. Saxena, V., Campbell, K.A., and Baker, R.J., "W-2W Current Steering DAC for Programming Phase Change Memory," Proceedings of the IEEE/EDS Workshop on Microelectronics and Electron Devices (WMED), pp. 59-62, April 3, 2009.
  • Saxena, V. and Baker, R.J., "Indirect Compensation Techniques for Three-Stage CMOS Op-amps," proceedings of the 52nd Midwest Symposium on Circuits and Systems, pp. 9-12, August 2-5, 2009.
  • Saxena, V., Li, K., Zheng, G., and Baker, R.J., "A K-Delta-1-Sigma_Modulator for Wideband Analog-to-Digital Conversion," proceedings of the 52nd Midwest Symposium on Circuits and Systems, pp. 411-415, August 2-5, 2009.
  • Saxena, V. and Baker, R.J., "Synthesis of Higher-Order K-Delta-1-Sigma Modulators for Wideband Analog to Digital Conversion," 4th Annual Austin Conference on Integrated Circuits & Systems, Oct. 26-27, 2009.
  • Li, K., Saxena, V., Zheng, G., and Baker, R.J., "Full Feed-Forward K-Delta-1-Sigma Modulator," 4th Annual Austin Conference on Integrated Circuits & Systems, Oct. 26-27, 2009.

2008

  • Saxena, V., and Baker, R.J., "Compensation of CMOS Op-Amps using Split-Length Transistors,", proceedings of the 51st Midwest Symposium on Circuits and Systems, pp. 109-112, August 10-13, 2008.
  • Saxena, V., and Baker, R.J., "Indirect Compensation Technique for Low-Voltage Op-Amps,", proceedings of the 3rd Annual Austin Conference on Integrated Systems and Circuits (ACISC), May 7-9, 2008.

2006

  • Saxena, V., and Baker, R. J., "Indirect Feedback Compensation of CMOS Op-Amps,", IEEE/EDS Workshop on Microelectronics and Electron Devices (WMED), pp. 3-4, April, 2006.
  • Duvvada, K., Saxena, V., and Baker, R. J., "High Speed Digital Input Buffer Circuits,", IEEE/EDS Workshop on Microelectronics and Electron Devices (WMED), pp. 11-12, April, 2006.
  • Saxena, V., Plum, T.J., Jessing, J.R., and Baker, R. J., "Design and Fabrication of a MEMS Capacitive Chemical Sensor System,", IEEE/EDS Workshop on Microelectronics and Electron Devices (WMED), pp. 17-18, April, 2006.

Selected Talks

  • Saxena, V. and V. Acharya, (2012) "Delta-Sigma ADC design: From System-level Design to Transistor-level Implementation," tutorial presented at IEEE MWSCAS 2012 in Boise.
  • Saxena, V. and Baker, R.J., (2007-2008) "High-Speed Op-Amp Design: Compensation and Topologies for Two and Three Stage Designs," presented at various universities and companies.