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Cadence FAQs

Q. What should I do when prompted for license checkout when using Cadence tools?

A. Select the 'Always' option. A common rule when using Cadence is 'Never click Never.

Q. What is a PDK?

A. PDK stands for Process Development Kit. Every chip fabrication (fab) service provides a kit that facilitates design, simulation and verification of chips designed using their technology. The PDK consists of Spectre and corner models, Calibre/Diva extraction data, DRC rules, programmable cells (PCells) and miscellaneous scripts.

Q. Can I purchase and install Cadence on my personal computer?

A. No.

Schematic Editor

Q. I can't open the schematics due to the “licence checkout error”.

A. This issue arises when you click 'Never' when prompted for license checkout. A common rule when working with Cadence is 'Never click Never'. This option gets saved in a .cdsenv file in your home directory. To fix this issue, delete the .cdsenv file in your home directory (NOT in the local work directory).

Virtuoso Layout

Q. How to get rid of grid errors layout DRC?

A. Make sure your major and Minor spacings in layout are multiple of the grid lambda. Lets say for 0.5u process the lambda=0.3u, then you change change the minor spacings to 0.9 and major to 4.5. The grid snap spacing can be 0.15.

cadence_faqs.txt · Last modified: 2016/09/17 15:16 (external edit)