Login to the ENGR server ece410.engr.uidaho.edu using X2Go Client. Linux and Mac users can use ssh instead of the X2Go client. They can do this with
ssh -XY [username]@ece410.engr.uidaho.edu
0) Open the .bashrc file in your home directory
cd gedit .bashrc
Add the following lines to the .bashrc file in your home directory
source /tools.new/cadence/setup/ic615 export PATH=$PATH:/tools.new/examples/bin
Refresh the bash shell
1) Goto your work directory. Better create a new directory for every course.
cd mkdir ece515 cd ece515
2) If you have existing files, save backups of the files below
cp .cdsinit .cdsinit_bkp cp cds.lib cds.lib_bkp
3) Copy .cdsinit from instructor's directory using the command below to your into ece515 directory
cp /home/vsaxena/pdk/ncsu-cdk-1.6.0.beta/cdssetup/cdsinit .cdsinit
4) If you dont have an existing cds.lib file, then copy the cds.lib file using the following command and skip to the next step:
cp /home/vsaxena/pdk/ncsu-cdk-1.6.0.beta/cdssetup/cds.lib cds.lib
If you have an existing cds.lib file, then merge the cds.lib file from (/home/vsaxena/pdk/ncsu-cdk-1.6.0.beta/cds.lib) with your existing cds.lib in the directory. This is equivalent to copying the following entries (note that CDK_DIR variable should be defined as in the first line below):
# NCSU Design Kit Path CDK_DIR = "/home/vsaxena/pdk/ncsu-cdk-1.6.0.beta" # Include basic Spectre and Verilog-A libraries DEFINE basic $CDSDIR/tools/dfII/etc/cdslib/basic DEFINE analogLib $CDSDIR/tools/dfII/etc/cdslib/artist/analogLib DEFINE functional $CDSDIR/tools/dfII/etc/cdslib/artist/functional DEFINE sbaLib $CDSDIR/tools/dfII/etc/cdslib/artist/sbaLib DEFINE ahdlLib $CDSDIR/tools/dfII/samples/artist/ahdlLib DEFINE bmslib $CDSDIR/tools/dfII/samples/artist/bmslib # Include NCSU PDK DEFINE basic $CDK_DIR/lib/basic DEFINE NCSU_Analog_Parts $CDK_DIR/lib/NCSU_Analog_Parts DEFINE NCSU_Digital_Parts $CDK_DIR/lib/NCSU_Digital_Parts --DEFINE MOSIS_Layout_Test $CDK_DIR/lib/MOSIS_Layout_Test DEFINE NCSU_TechLib_ami06 $CDK_DIR/lib/NCSU_TechLib_ami06 DEFINE NCSU_TechLib_ami16 $CDK_DIR/lib/NCSU_TechLib_ami16 DEFINE NCSU_TechLib_hp06 $CDK_DIR/lib/NCSU_TechLib_hp06 DEFINE NCSU_TechLib_tsmc02 $CDK_DIR/lib/NCSU_TechLib_tsmc02 DEFINE NCSU_TechLib_tsmc02d $CDK_DIR/lib/NCSU_TechLib_tsmc02d DEFINE NCSU_TechLib_tsmc03 $CDK_DIR/lib/NCSU_TechLib_tsmc03 DEFINE NCSU_TechLib_tsmc03d $CDK_DIR/lib/NCSU_TechLib_tsmc03d DEFINE NCSU_TechLib_tsmc04_4M2P $CDK_DIR/lib/NCSU_TechLib_tsmc04_4M2P
5) You should be ready to start Cadence Virtuoso now!
You can add CMOS book examples by adding the following line to your cds.lib file
Simulation models are located in the following directory on the ece410.engr.uidaho.edu server.
The course uses a combination of long-channel (1um) and short-channel (180nm or 0.18um) CMOS models.
The 1um models (in file cmosedu_models.txt) are for a closer matching to hand-calculations for some of the Homework problems, while 180nm models (in file tsmc018.scs) provides a more realistic design experience in HWs and the project.
Please follow the instructions below to use the 180nm CMOS models. The method is same for using any other model e.g. 1um model. Its a good idea to open the model file and take a look at the contents.
You can see my example schematics by adding the following lines to your cds.lib
/home/vsaxena/ece515/HW1 HW1 /home/vsaxena/ece515/HW1_180n HW1_180n
I-V and Parametric Sweeps - Thanks to Jubayer!